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Nanoimprint Lithography and Applications at Hewlett Packard Labs
February 15, 2005
presented by IEEE SF Bay Area Nanotechnology Council


Scientific interest and potential commercial impact have attracted a lot of attention to nanotechnology. However, it is still a challenge to fabricate nanostructure reliably at low cost. Nanoimprint lithography (NIL), on the other hand, emerged as a lithography choice because of the high resolution, low cost and high through-put advantages. This presentation will give an overview of nanoimprint lithography, especially the nanoimprint technology development at Hewlett-Packard labs. Applications, including molecular memory and logic circuits, biological sensors, and nano-enhanced spectroscopy, which are based on HP labs' nanoimprint lithography and nanofabrication expertise will be presented, too.

When: February 15, 2005
11:45 to 1:00 PM

Cost IEEE members: $5.00
Non-members: $10.00
Pay at the door (cash or checks, no credit cards please)

RSVP: Email: dhavaljb@ieee.org to RSVP or with questions
You must RSVP to attend

Where: National Semiconductor
Building 31
955 Kifer Road
Santa Clara, CA 95051
phone number

Directions:
From San Francisco Airport: Take the Bayshore Freeway 101 (South) toward San Jose, exit on Lawrence Expressway (South), to Kifer Road. Turn right on Kifer Road and locate the National Semiconductor Building 31 (955 Kifer Road).
From San Jose Airport: Exit (left) on to Guadalupe Parkway. Continue to Bayshore Freeway101 (North), toward San Francisco. Then exit on Lawrence Expressway (South), to Kifer Road. Turn right on Kifer Road locate the National Semiconductor Building 31 (955 Kifer Road).
Agenda: Light lunch from 11:45 to 12:00 noon
Noon to 1:00 p.m: Wei Wu speaks

About Wei Wu
Wei Wu received his B.S. in Physics in 1996 from Peking University and Ph.D. in Electrical Engineering in 2003 from Princeton University. His graduate study was under the direction of Professor Stephen Y. Chou, the inventor of NIL. Wei Wu helped develop the NIL technology right from its birth and he also demonstrated the first room temperature single electron memory fabricated using NIL and the first large area patterned magnetic media using NIL. Since joining HP in 2003, he has worked on molecular electronics. He fabricated molecular memory circuits with the record high density (28 Gbits/cm2). He is also working on the development of HP's next generation NIL machine.
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